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SR-9000 Super-Resolution Detection System for SiC EPI-Wafers and Devices
SR-9000 Super-Resolution Detection System for SiC EPI-Wafers and Devices
The SR-9000 is designed to address the defect inspection requirements of SiC epitaxial wafers and chips. It targets the current limitation in epitaxial wafer inspection, where precise quantification and spatial distribution of TSD and TED defects are difficult to obtain. Through high-precision detection, the system enables accurate identification and localization of TSD defects in SiC epitaxy and chips, providing critical support for further improvement of chip yield and performance.

The system supports defect inspection of SiC epitaxial wafers (pattern-free) and chips (patterned), enabling identification and classification of TSD, TED, and other defect types, including BPD, SF, SSF, BSF, triangular defects, and carrot defects. It achieves ultra-high localization accuracy, with TSD/TED localization accuracy <1 μm and chip structure localization accuracy <1 μm. The system throughput is 4–5 wafers per hour for 6-inch wafers and 2–3 wafers per hour for 8-inch wafers.
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Key Features

  • Supports defect detection for SiC epitaxial wafers (unpatterned) and chips (patterned)

  • Accurately identifies and classifies TSD and TED defects in epitaxial wafers

  • Ultra-high positioning accuracy (spatial resolution): TSD/TED positioning accuracy < 1 μm; chip structural accuracy < 1 μm


Overcoming Industry Challenges

Currently, defect detection in SiC epitaxial wafers lacks precise information on the quantity and distribution of TSDs and TEDs. As device manufacturers impose increasingly stringent requirements on chip failure rates and reliability, the impact of microscopic defects such as TSDs on devices has become particularly significant. The SR9000 enables the precise identification and localization of TSD defects in SiC epitaxial layers and chips through high-precision detection, providing a crucial foundation for further improvements in chip yield and performance.


Specifications

Throughput

4-5 wafers/hour (6"); 2-3 wafers/hour (8")

Supported Inspection Object

SiC epitaxial wafers, patterned (device-level) SiC wafers, ion-implanted SiC wafers, SiC wafers/devices after metal layer stripping

Compatible Sample Sizes

6", 8", and 12

Inspection Defect Type

TSD, TED, BPD, SF, SSF, BSF, triangular defects, carrot defects, etc.

Defect Positioning Accuracy

< 1 μm

Patterned Wafer Detection

Enables the identification and positioning of device functional structures



Case Examples

Addressing Industry Pain Points

SR 9000-EX-1


Feasibility of Inspecting the Si Surface and C Surface of Substrate Wafers

SR 9000-EX-2


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